MvexRegMemConv

MVEX register/memory operand conversion

iced_x86.MvexRegMemConv.NONE: int = 0

No operand conversion

iced_x86.MvexRegMemConv.REG_SWIZZLE_NONE: int = 1

Register swizzle: zmm0 or zmm0 {dcba}

iced_x86.MvexRegMemConv.REG_SWIZZLE_CDAB: int = 2

Register swizzle: zmm0 {cdab}

iced_x86.MvexRegMemConv.REG_SWIZZLE_BADC: int = 3

Register swizzle: zmm0 {badc}

iced_x86.MvexRegMemConv.REG_SWIZZLE_DACB: int = 4

Register swizzle: zmm0 {dacb}

iced_x86.MvexRegMemConv.REG_SWIZZLE_AAAA: int = 5

Register swizzle: zmm0 {aaaa}

iced_x86.MvexRegMemConv.REG_SWIZZLE_BBBB: int = 6

Register swizzle: zmm0 {bbbb}

iced_x86.MvexRegMemConv.REG_SWIZZLE_CCCC: int = 7

Register swizzle: zmm0 {cccc}

iced_x86.MvexRegMemConv.REG_SWIZZLE_DDDD: int = 8

Register swizzle: zmm0 {dddd}

iced_x86.MvexRegMemConv.MEM_CONV_NONE: int = 9

Memory Up/DownConv: [rax] / zmm0

iced_x86.MvexRegMemConv.MEM_CONV_BROADCAST1: int = 10

Memory UpConv: [rax] {1to16} or [rax] {1to8}

iced_x86.MvexRegMemConv.MEM_CONV_BROADCAST4: int = 11

Memory UpConv: [rax] {4to16} or [rax] {4to8}

iced_x86.MvexRegMemConv.MEM_CONV_FLOAT16: int = 12

Memory Up/DownConv: [rax] {float16} / zmm0 {float16}

iced_x86.MvexRegMemConv.MEM_CONV_UINT8: int = 13

Memory Up/DownConv: [rax] {uint8} / zmm0 {uint8}

iced_x86.MvexRegMemConv.MEM_CONV_SINT8: int = 14

Memory Up/DownConv: [rax] {sint8} / zmm0 {sint8}

iced_x86.MvexRegMemConv.MEM_CONV_UINT16: int = 15

Memory Up/DownConv: [rax] {uint16} / zmm0 {uint16}

iced_x86.MvexRegMemConv.MEM_CONV_SINT16: int = 16

Memory Up/DownConv: [rax] {sint16} / zmm0 {sint16}